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A Hardware Track-Trigger for CMSThe Hough Transform

A Hardware Track-Trigger for CMS: The Hough Transform [The Hough Transform is widely used to detect parametrically described curves in an image that can contain noise or partial occlusion. It is shown how a two dimensional linear Hough Transform can be used to identify track candidates within the CMS tracker. Three implementations of this algorithm in FPGA firmware are presented: a systolic array, a pipelined array, and an optimised pipelined solution called the daisy-chained array. For each, the performance in terms of track finding efficiency and fake rate is presented, alongside the corresponding FPGA resource utilisation and latency. The method used to pre-process and distribute the tracker hits is also described. Potential algorithmic and technical improvements are discussed, in addition to the scaling of the implementation to a variety of FPGA devices.] http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png

A Hardware Track-Trigger for CMSThe Hough Transform

Part of the Springer Theses Book Series
James, Thomas Owen
A Hardware Track-Trigger for CMS — Oct 29, 2019
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Publisher
Springer International Publishing
Copyright
© Springer Nature Switzerland AG 2019
ISBN
978-3-030-31933-5
Pages
39 –68
DOI
10.1007/978-3-030-31934-2_4
Publisher site
See Chapter on Publisher Site

Abstract

[The Hough Transform is widely used to detect parametrically described curves in an image that can contain noise or partial occlusion. It is shown how a two dimensional linear Hough Transform can be used to identify track candidates within the CMS tracker. Three implementations of this algorithm in FPGA firmware are presented: a systolic array, a pipelined array, and an optimised pipelined solution called the daisy-chained array. For each, the performance in terms of track finding efficiency and fake rate is presented, alongside the corresponding FPGA resource utilisation and latency. The method used to pre-process and distribute the tracker hits is also described. Potential algorithmic and technical improvements are discussed, in addition to the scaling of the implementation to a variety of FPGA devices.]

Published: Oct 29, 2019

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