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A Practical Approach to VLSI System on Chip (SoC) DesignSoC Physical Design

A Practical Approach to VLSI System on Chip (SoC) Design: SoC Physical Design [This chapter deals with the SOC design as a re-convergent model and the physical design of the system on chip (SOC). The process of converting the SOC design netlist to the design layout file in GDS format is explained in this chapter. The chapter introduces different design file formats used during the physical design. The process of photolithography, which uses the SOC design layout file taped out as input, is covered in brief.] http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png

A Practical Approach to VLSI System on Chip (SoC) DesignSoC Physical Design

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Publisher
Springer International Publishing
Copyright
© The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerland AG 2022
ISBN
978-3-031-18362-1
Pages
169 –197
DOI
10.1007/978-3-031-18363-8_8
Publisher site
See Chapter on Publisher Site

Abstract

[This chapter deals with the SOC design as a re-convergent model and the physical design of the system on chip (SOC). The process of converting the SOC design netlist to the design layout file in GDS format is explained in this chapter. The chapter introduces different design file formats used during the physical design. The process of photolithography, which uses the SOC design layout file taped out as input, is covered in brief.]

Published: Dec 14, 2022

Keywords: Re-convergence; Physical design; Place and route; CTS; GDS II; LEF; Layout; Clock route; Power route; Detail route; DRC; Floor plan; ECO

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