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A Practical Approach to VLSI System on Chip (SoC) DesignVLSI Logic Design and HDL

A Practical Approach to VLSI System on Chip (SoC) Design: VLSI Logic Design and HDL [This chapter discusses important SOC design techniques, focusing on logic design, optimization, and HDL modelling of SOC designs. The topics covered in this chapter are the logic fundamentals like synchronous and asynchronous logic, sequential and combinational logic designs, speed matching, finite-state machines, hardware accelerators, NOC architecture for SOC design and RTL modelling techniques, and HDL coding styles for synthesis. It covers the importance of standard cell libraries in automatic cell-based designs and the different design file formats used in the SOC design flow. The reader is advised to refer to VLSI logic design books for a fundamental understanding of VLSI design and books on hardware description languages like System Verilog and VHDL for basic understanding of HDL language constructs.] http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png

A Practical Approach to VLSI System on Chip (SoC) DesignVLSI Logic Design and HDL

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Publisher
Springer International Publishing
Copyright
© The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerland AG 2022
ISBN
978-3-031-18362-1
Pages
59 –77
DOI
10.1007/978-3-031-18363-8_4
Publisher site
See Chapter on Publisher Site

Abstract

[This chapter discusses important SOC design techniques, focusing on logic design, optimization, and HDL modelling of SOC designs. The topics covered in this chapter are the logic fundamentals like synchronous and asynchronous logic, sequential and combinational logic designs, speed matching, finite-state machines, hardware accelerators, NOC architecture for SOC design and RTL modelling techniques, and HDL coding styles for synthesis. It covers the importance of standard cell libraries in automatic cell-based designs and the different design file formats used in the SOC design flow. The reader is advised to refer to VLSI logic design books for a fundamental understanding of VLSI design and books on hardware description languages like System Verilog and VHDL for basic understanding of HDL language constructs.]

Published: Dec 14, 2022

Keywords: Synchronous design; Asynchronous design; Sequential circuits; Combinational circuits; Asynchronous reset; Synchronous reset; Clock domain crossover; Network on chip; NOC; HDL; System Verilog; VHDL; FSMs; Hard macro; Soft macro; Modeling styles

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