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A Practical Guide for SystemVerilog AssertionsSVA for Finite State Machines

A Practical Guide for SystemVerilog Assertions: SVA for Finite State Machines Chapter 3 FSM is the main control block in any design. It helps the design progress from state to state in an orderly manner by generating the respective control signals. Another way to generate control signals is by combining counters and glue logic. But it lacks good design structure and is also difficult to debug. An FSM provides great hardware infrastructure for control signals and also debugging capabilities since each state of the design is usually well defined. There are two types of FSMs: Moore State machine - The Moore FSM outputs are the function of the present state only. Mealy State machine - One or more of the Mealy FSM outputs are a fiinction of the present state and one or more of the inputs. Different types of coding styles are used to describe the states of an FSM. The most popular coding style is the one-hot coding, wherein a one-bit register represents each state. This proves to be the fastest architecture. If the FSM has too many states, then one-hot coding will produce a rather big hardware. In these cases binary encoding is preferred. Another kind of encoding used commonly to describe an FSM is the gray http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png

A Practical Guide for SystemVerilog AssertionsSVA for Finite State Machines

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Publisher
Springer US
Copyright
© Springer Science+Business Media, Inc. 2005
ISBN
978-0-387-26049-5
Pages
139 –166
DOI
10.1007/0-387-26173-7_4
Publisher site
See Chapter on Publisher Site

Abstract

Chapter 3 FSM is the main control block in any design. It helps the design progress from state to state in an orderly manner by generating the respective control signals. Another way to generate control signals is by combining counters and glue logic. But it lacks good design structure and is also difficult to debug. An FSM provides great hardware infrastructure for control signals and also debugging capabilities since each state of the design is usually well defined. There are two types of FSMs: Moore State machine - The Moore FSM outputs are the function of the present state only. Mealy State machine - One or more of the Mealy FSM outputs are a fiinction of the present state and one or more of the inputs. Different types of coding styles are used to describe the states of an FSM. The most popular coding style is the one-hot coding, wherein a one-bit register represents each state. This proves to be the fastest architecture. If the FSM has too many states, then one-hot coding will produce a rather big hardware. In these cases binary encoding is preferred. Another kind of encoding used commonly to describe an FSM is the gray

Published: Jan 1, 2005

Keywords: State Machine; Clock Cycle; Finite State Machine; Idle State; Cover Property

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