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A Primer on Compression in the Memory HierarchyIntroduction

A Primer on Compression in the Memory Hierarchy: Introduction [The memory hierarchy of a computer is a critical system component, impacting the system’s overall performance, energy consumption, and cost. As processors have become faster, the memory hierarchy has become deeper (i.e., more levels) to help bridge the speed, energy, and bandwidth gaps between processors and relatively slower (and larger) main memories. Today’s processors are typically clocked at a few GHz, while a main-memory access may take many tens of nanoseconds. Since high-performance processors may execute many instructions per cycle, a single mainmemory access may consume the same time as a few hundred instructions. Similarly, accessing an off-chip memory location consumes one or more orders of magnitude greater energy than an access to an on-chip memory location. Finally, higher (i.e., smaller) levels of the memory hierarchy typically have significantly higher bandwidth than lower (i.e., larger) levels, resulting in a significant bandwidth gap.] http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png

A Primer on Compression in the Memory HierarchyIntroduction

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Publisher
Springer International Publishing
Copyright
© Springer Nature Switzerland AG 2016
ISBN
978-3-031-00623-4
Pages
1 –2
DOI
10.1007/978-3-031-01751-3_1
Publisher site
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Abstract

[The memory hierarchy of a computer is a critical system component, impacting the system’s overall performance, energy consumption, and cost. As processors have become faster, the memory hierarchy has become deeper (i.e., more levels) to help bridge the speed, energy, and bandwidth gaps between processors and relatively slower (and larger) main memories. Today’s processors are typically clocked at a few GHz, while a main-memory access may take many tens of nanoseconds. Since high-performance processors may execute many instructions per cycle, a single mainmemory access may consume the same time as a few hundred instructions. Similarly, accessing an off-chip memory location consumes one or more orders of magnitude greater energy than an access to an on-chip memory location. Finally, higher (i.e., smaller) levels of the memory hierarchy typically have significantly higher bandwidth than lower (i.e., larger) levels, resulting in a significant bandwidth gap.]

Published: Jan 1, 2016

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